Impact of High- Gate Stacks on Transport and Variability in Nano-CMOS Devices
نویسندگان
چکیده
Impact of HighGate Stacks on Transport and Variability in Nano-CMOS Devices J. R. Watling1, A. R. Brown1, G. Ferrari2, J. R. Barker1, G. Bersuker3, P. Zeitzoff4, and A. Asenov1 ∗ 1Device Modelling Group, Department of Electronics and Electrical Engineering, University of Glasgow, Glasgow G12 8LT, UK 2INFM-S and Physics Department, University of Modena and Reggio Emilia, I-41100 Modena, Italy 3SEMATECH, 2706 Montopolis Drive, Austin, TX 78741, USA 4Freescale Semiconductor, 255 Fuller Road, Albany, NY 12203, USA
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